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Microchip Technology /ATSAME51G18A /SERCOM0 /SPIS /CTRLC

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Interpret as CTRLC

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ICSPACE0 (DATA_TRANS_8BIT)DATA32B

DATA32B=DATA_TRANS_8BIT

Description

SPIS Control C

Fields

ICSPACE

Inter-Character Spacing
DATA32B

Data 32 Bit

0 (DATA_TRANS_8BIT): Transaction from and to DATA register are 8-bit

1 (DATA_TRANS_32BIT): Transaction from and to DATA register are 32-bit

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data